STM32 Timer Example

STM32 Timer Example

The STM32 Timer example program shows how to configure and use the timer TIM1 of STMicroelectronics STM32F103xx microcontroller.

TIM1 is configured to generate an update interrupt every 250 ms. The lit LED moves on every timer tick.

The configuration of the clocks and the timer TIM1 is done using the Configuration Wizard in file STM32_Init.c.

Two Vision targets are available:

Simulator where the program runs in the software simulator.
MCBSTM32 where the program runs from internal Flash located on the microcontroller.

stm32_timer.zip

Posted in STM

Convert string to char

 

STM32L152RB Ultra-low-power ARM Cortex-M3 MCU with 128 Kbytes Flash, 32 MHz CPU, LCD, USB

The ultralow power STM32L15xxx incorporates the connectivity power of the universal serial bus (USB) with the high-performance ARM Cortex™-M3 32-bit RISC core operating at a 32 MHz frequency, a memory protection unit (MPU), high-speed embedded memories (Flash memory up to 128 Kbytes and RAM up to 16 Kbytes), and an extensive range of enhanced I/Os and peripherals connected to two APB buses. All devices offer a 12-bit ADC, 2 DACs and 2 ultralow power comparators, six general-purpose 16-bit timers and two basic timers, which can be used as time bases. Moreover, the STM32L15xxx devices contain standard and advanced communication interfaces: up to two I2Cs and SPIs, three USARTs and a USB. They also include a real-time clock and a set of backup registers that remain powered in Standby mode. Finally, the integrated LCD controller has a built-in LCD voltage generator that allows you to drive up to 8 multiplexed LCDs with contrast independent of the supply voltage.

The ultralow power STM32L15xxx operates from a 1.8 to 3.6 V power supply (down to 1.65 V at power down) with BOR and from a 1.65 to 3.6 V power supply without BOR option. It is available in the -40 to +85 °C temperature range. A comprehensive set of power-saving modes allows the design of low-power applications.

Operating conditions
Operating power supply range: 1.65 V to 3.6 V (without BOR) or 1.8 V to 3.6 V (with BOR option)
Temperature range: –40 to 85 °C
Low power features
4 modes: Sleep, Low-power run (9 μA at 32 kHz), Low-power sleep (4.4 μA),Stop with RTC (1.45 μA), Stop (570 nA), Standby (300 nA)
Dynamic core voltage scaling down to 233 μA/MHz
Ultralow leakage per I/O: 50 nA
Fast wakeup from Stop: 8 μs
Three wakeup pins
Core: ARM 32-bit Cortex™-M3 CPU
32 MHz maximum frequency,33.3 DMIPS peak (Dhrystone 2.1)
Memory protection unit
Reset and supply management
Low power, ultrasafe BOR (brownout reset) with 5 selectable thresholds
Ultralow power POR/PDR
Programmable voltage detector (PVD)
Clock management
1 to 24 MHz crystal oscillator
32 kHz oscillator for RTC with calibration
Internal 16 MHz factory-trimmed RC
Internal 37 kHz low consumption RC
Internal multispeed low power RC, 65 kHz to 4.2 MHz with consumption down to 1.5 μA
PLL for CPU clock and USB (48 MHz)
Low power calendar RTC
Alarm, periodic wakeup from Stop/Standby
Memories
Up to 128 Kbyte of Flash memory with ECC
4 Kbyte of data EEPROM with ECC
Up to 16 Kbyte of RAM
Up to 83 fast I/Os (73 of which are 5 V-tolerant) all mappable on 16 external interrupt vectors
Development support
Serial wire debug, JTAG and trace
DMA: 7-channel DMA controller, supporting timers, ADC, SPIs, I2Cs and USARTs
LCD 8 × 40 or 4 × 44 with step-up converter
12-bit ADC up to 1 Msps/24 channels
Temperature sensor and internal voltage reference
Operates down to 1.8 V
2 × 12-bit DACs with output buffers
2 ultralow power comparators
Window mode and wakeup capability
10 timers:
6 × 16-bit general-purpose timers, each with up to 4 IC/OC/PWM channels
2 × 16-bit basic timers
2 × watchdog timers (independent and window)
Up to 8 communication interfaces
Up to 2 × I2C interfaces (SMBus/PMBus)
Up to 3 × USARTs (ISO 7816 interface, LIN, IrDA capability, modem control)
Up to 2 × SPIs (16 Mbit/s)
USB 2.0 full speed interface
CRC calculation unit, 96-bit unique ID

This section covers some of the most common DNS record types.

A record: This record maps an IP Address to a hostname.

www IN A 192.168.1.12

CNAME record: Used to create an alias to an existing A record. You cannot create a CNAME record pointing to another CNAME record.

web IN CNAME www
MX record: Used to define where email should be sent to. Must point to an A record, not a CNAME.

IN MX mail.example.com.
mail IN A 192.168.1.13
NS record: Used to define which servers serve copies of a zone. It must point to an A record, not a CNAME. This is where Primary and Secondary servers are defined.

IN NS ns.example.com.
IN NS ns2.example.com.
ns IN A 192.168.1.10
ns2 IN A 192.168.1.11

strstr — Find the first occurrence of a string

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Posted in Php

c# performance effect of threading